Grovf is seeking a skilled ASIC Design Verification Team Lead to join our R&D team in Yerevan, Armenia, or remotely. Our work environment is dynamic, educational, and challenging, offering employees the opportunity to contribute to the development of next-generation networking devices for next-generation AI Infrastructure that leads the industry in performance and power efficiency. As part of the team, you will be involved in all stages of ASIC development, including Micro-Architecture, Design, and Verification. Our collaborative environment fosters growth, innovation, and leadership, offering the opportunity to work alongside industry experts and contribute to groundbreaking advancements. At Grovf, every individual plays a vital role in the company's success. If you're looking for a rewarding career, talented colleagues, and a great environment that fosters growth, challenges, and leadership, Grovf is the place for you.

Requirements։

• 8 plus years of experience working in digital design verification positions
• 3 years of experience in a leadership role, with the ability to mentor and inspire a team of engineers
• Extensive knowledge of VLSI verification flows, concepts, and methodologies
• Successfully completed full block/system verification cycles through to tape-out
• Industry expert in standard verification methodologies - UVM, SystemVerilog
• Experienced with high-speed communication protocols - Ethernet, PCIe
• Ability to effectively work with global, cross-functional teams.

Job Responsibilities:

• Take charge of an ASIC Design Verification team, guiding and mentoring engineers to achieve successful verification outcomes for next-generation networking devices․ Lead the team through end-to-end verification cycles, from initial test planning to final validation, ensuring a smooth transition through to tape-out
• Create and implement comprehensive verification plans for ASIC designs, ensuring full functional and performance validation across multiple stages of development․ Drive the application of industry-standard verification methodologies (UVM) to ensure effective test benches and comprehensive coverage for high-speed ASIC designs
• Work closely with design and architecture teams to understand project requirements and design specifications. Work effectively with global teams across different time zones and disciplines, ensuring smooth communication and successful execution of project deliverables
• Track and manage verification progress, report on test coverage, defect discovery, and overall project status to stakeholders and senior management
• Provide technical leadership and mentorship to junior and mid-level verification engineers, fostering a collaborative environment for learning and growth
• Ensure that verification goals are met on time and that ASIC designs meet required specifications and performance benchmarks before tape-out
• Encourage innovative approaches to solving complex verification challenges and promote a culture of excellence and continuous improvement within the team.