Senior Asic Digital Designer

Avicena

Mountain View, CA, US
  • Job Type: Full-Time
  • Function: Engineering Hardware
  • Post Date: 06/11/2021
  • Website: www.avicena.tech
  • Company Address: 1231 Bordeaux Dr, Sunnyvale, CA 94089

About Avicena

High Bandwidth Semiconductor Interconnects

Job Description

  • Masters or Ph.D. degree in Electrical Engineering
  • 7 years experience in digital design from specs to architecture, design, bench testing and all the way to high-volume production
  • Deep understanding of RTL design for high speed datapath and signal processing; familiarity with verification
  • Good understanding of the digital design flow, verification flow and design for testability

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Disclaimer: Local Candidates Only
This company does NOT accept candidates from outside recruiting firms. Agency contacts are not welcome.