Senior SI Test Engineer

Montage Technology

Shanghai, CN / Kunshan, CN
  • Job Type: Full-Time
  • Function: Engineering QA
  • Post Date: 04/08/2021
  • Website: www.montage-tech.com
  • Company Address: Room A1601, Technology Building, Shanghai, 200233

About Montage Technology

Montage Technology is a global leading fabless provider of analog and mixed-signal semiconductor solutions currently addressing the home entertainment and cloud computing markets.

The foundation of company's technology platform is the ability to design high performance, low power semiconductors by using the proprietary building blocks which include radio frequency and analog front end solutions, digital signal processors and high speed interfaces.

Job Description

  • Working with chip design teams to validate the performance of high speed Serdes chips;
  • Perform Serdes signal integrity related measurement on RD phase, including S parameters, impedance, eyes, all kinds of jitters and noise, JTOL, bathtub curve, phase jitter;
  • Perform the compliance test according to the PCIe and 802.3 standards;
  • Writing Python codes to conduct automatic measurement on Serdes transmitter, receiver and system board;
  • Debug problems together with chip design teams.

Qualification

  • BSEE with 7 years of applicable work experience or MSEE with 5 years of experience;
  • Strong knowledge in measurement theory and measurement skills (VNA, TDR, Real Time Scope, BERT);
  • Proficient theory on series equalization, Serdes circuit (FFE/CTLE/DFE) and jitter separation;
  • Very familiar with PCIe standards. Knowing 25G/56G/112G Ethernet and CEI is a plus;
  • Good skills on Python coding;
  • Experience with at least one PCB layout tools: Cadence Allegro, Mentor Expedition or Altium Protel.

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Disclaimer: Local Candidates Only
This company does NOT accept candidates from outside recruiting firms. Agency contacts are not welcome.