Snr Analog Technical & Management Lead CH

Kandou Bus

Lausanne, CH
  • Job Type: Full-Time
  • Function: Engineering Hardware
  • Post Date: 04/22/2021
  • Website:
  • Company Address:

About Kandou Bus

Developer of a SerDes IP and chip serial links designed to provide enhanced communications between chips inside electronic systems. The company's chip links increase the bit-rate and the reach for given physical communication and reduces the power consumption, enabling users to get compute power in a smaller form factor, at a lower cost and less energy consumption.

Job Description

We at Kandou are a team of passionate professionals striving to make a mark in the trajectory of the semiconductor industry. Our list of costumers reads like a who's who of the technology world. If you love to be part of a start-up that is challenging established tech giants and you are a proactive problem-solver who is motivated by pushing your limits and challenging the status quo, we have an opportunity for you.


Location:  Switzerland - Lausanne;


Role responsibilities


  • Ownership of complex macros such as full Rx/Tx circuits including specification, design, verification, schedule and documentation
  • Ability to communicate effectively with architects throughout the design process so as to optimize specification and performance
  • Innovate and deliver creative solutions and encourage patenting of ideas
  • Crisis management - leading task forces to deliver timely solutions under pressure
  • Helping peers and subordinates break through design problems
  • Work effectively with cross-functional teams
  • Rigorous approach focused on delivering high quality results using Kandou’s design process flow.
  • Plan and track team assignments/progress to meet schedule
  • Be part of the sign off team for design reviews



  • Minimum 10+ years of relevant industry experience in analog IC design
  • Hands on experience in analog design of high-speed serial communications or power management circuits
  • Deep understanding of analog circuit theory and device fundamentals
  • Experience of analog design in FinFet technologies at 16nm and below
  • Ability to lead teams to deliver complex technologies from feasibility study to production
  • Ensure teams are working to Kandou’s documented design process
  • Ability to manage scope versus schedule
  • Line management experience (mentoring, setting goals, performance reviews, hiring etc.)
  • Ability to communicate with and present to customers both internal & external
  • Experience planning post silicon validation, interpreting char & ATE results
  • Excellent at documentation of block specifications / requirements
  • An autonomous self-starter that is also a team player
  • Familiar with Cadence analog design EDA tools
  • B.Eng. or equivalent (or higher) degree in Electrical Engineering / Microelectronics

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Disclaimer: Local Candidates Only
This company does NOT accept candidates from outside recruiting firms. Agency contacts are not welcome.